Intel Xeon Phi Coprocessor

User 140 | 9/3/2014, 10:13:18 PM

Has anyone tried compiling/running GraphLab on an Intel Xeon Phi Coprocessor (sometimes referred to as a MIC board), a 60-core SMP coprocessor attached via PCI-e. (http://www.intel.com/content/www/us/en/processors/xeon/xeon-phi-detail.html)

It looks like code must be recompiled using the Intel provided compiler for the device. And the device lacks some special instruction sets like MMX, SSE, and AVX (although it does have its own 512 bit wide SIMD vector ISA). Does GraphLab explicitly use those instruction sets?

thanks Scott

Comments

User 6 | 9/4/2014, 5:53:41 AM

Hi Scott, The question of compiling PowerGraph to special hardware platforms sometimes pops up. We are not able to support those efforts, first because we do not have the hardware, and second because we are missing the resources. A related thread which discusses PowerGraph compilation to ARM is here: https://groups.google.com/forum/#!msg/graphlab-kdd/JOUBPIuaYyk/gQX7rqsziOYJ Some of the PowerGraph specific details are: - Using boost::context needs to be verified for ARM. - There is one lock-free queue data structure that probably needs a few fences to ensure correctness in the ARM memory model. - Some stuff in parallel/pthread_tools may need to be verified too (like the spin lock).

Good luck with your exploration..


User 140 | 9/4/2014, 3:49:35 PM

Hi Danny,

Thanks for your reply. Xeon Phi is actually an x86-64 CPU based on a modified Pentium processor. It looks like pthreads and <a href="https://software.intel.com/en-us/articles/building-the-boost-library-to-run-natively-on-intelr-xeon-phitm-coprocessor">boost</a> can be compiled for the Phi. I don't know much about memory fences though.

Scott